1045 search results - page 168 / 209 » Improving SHA-2 Hardware Implementations |
IWSOC
2003
IEEE
14 years 27 days ago
2003
IEEE
: - A filter cache is proposed at a higher level than the L1 (main) cache in the memory hierarchy and is much smaller. The typical size of filter cache is of the order of 512 Bytes...
SBACPAD
2003
IEEE
14 years 27 days ago
2003
IEEE
This paper discusses the implementation of a numerical algorithm for simulating incompressible fluid flows based on the finite difference method and designed for parallel compu...
MICRO
2002
IEEE
14 years 16 days ago
2002
IEEE
Register integration (or just integration) is a register renaming discipline that implements instruction reuse via physical register sharing. Initially developed to perform squash...
SI3D
1999
ACM
13 years 12 months ago
1999
ACM
With fast 3D graphics becoming more and more available even on low end platforms, the focus in developing new graphics hardware is beginning to shift towards higher quality render...
HPCA
1998
IEEE
13 years 12 months ago
1998
IEEE
Good network hardware performance is often squandered by overheads for accessing the network interface (NI) within a host. NIs that support user-level messaging avoid frequent ope...