Sciweavers

1045 search results - page 187 / 209
» Improving SHA-2 Hardware Implementations
Sort
View
SAT
2009
Springer
113views Hardware» more  SAT 2009»
14 years 2 months ago
Exploiting Cycle Structures in Max-SAT
We investigate the role of cycles structures (i.e., subsets of clauses of the form ¯l1 ∨ l2, ¯l1 ∨ l3, ¯l2 ∨ ¯l3) in the quality of the lower bound (LB) of modern MaxSAT ...
Chu Min Li, Felip Manyà, Nouredine Ould Moh...
IEEEPACT
2007
IEEE
14 years 1 months ago
Performance Portable Optimizations for Loops Containing Communication Operations
Effective use of communication networks is critical to the performance and scalability of parallel applications. Partitioned Global Address Space languages like UPC bring the pro...
Costin Iancu, Wei Chen, Katherine A. Yelick
ISCA
2007
IEEE
177views Hardware» more  ISCA 2007»
14 years 1 months ago
Adaptive insertion policies for high performance caching
The commonly used LRU replacement policy is susceptible to thrashing for memory-intensive workloads that have a working set greater than the available cache size. For such applica...
Moinuddin K. Qureshi, Aamer Jaleel, Yale N. Patt, ...
MICRO
2007
IEEE
115views Hardware» more  MICRO 2007»
14 years 1 months ago
Optimizing NUCA Organizations and Wiring Alternatives for Large Caches with CACTI 6.0
A significant part of future microprocessor real estate will be dedicated to L2 or L3 caches. These on-chip caches will heavily impact processor performance, power dissipation, a...
Naveen Muralimanohar, Rajeev Balasubramonian, Norm...
ESTIMEDIA
2007
Springer
14 years 1 months ago
Leveraging Predicated Execution for Multimedia Processing
—Modern compression standards such as H.264, DivX, or VC-1 provide astonishing quality at the costs of steadily increasing processing requirements. Therefore, efficient solution...
Dietmar Ebner, Florian Brandner, Andreas Krall