1045 search results - page 191 / 209 » Improving SHA-2 Hardware Implementations |
DSD
2010
IEEE
13 years 7 months ago
2010
IEEE
—Periodic on-chip scan-based tests have to be applied to a many-core processor SoC to improve its dependability. An infrastructural IP module has been designed and incorporated i...
BMCBI
2010
13 years 7 months ago
2010
Background: Solving bioinformatics tasks often requires extensive computational power. Recent trends in processor architecture combine multiple cores into a single chip to improve...
CGF
2008
13 years 7 months ago
2008
We present an interactive GPU-based algorithm for accurately rendering high-quality, dynamic glossy reflection effects from both HDR environment maps and local scene objects. Our ...
CG
2007
Springer
13 years 7 months ago
2007
Springer
With the availability of pen-enabled digital hardware, sketch-based 3D modeling is becoming an increasingly attractive alternative to traditional methods in many design environmen...
MICRO
2000
IEEE
13 years 7 months ago
2000
IEEE
level of abstraction, compared with the program representation for scalar optimizations. For example, loop unrolling and loop unrolland-jam transformations exploit the large regist...