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ISCAS
2003
IEEE
100views Hardware» more  ISCAS 2003»
14 years 1 months ago
Area-effective FIR filter design for multiplier-less implementation
The hardware complexity of digital filters is not controllable by straightforwardly rounding the coefficients to the quantization levels. In this paper, we propose an effective al...
Tay-Jyi Lin, Tsung-Hsun Yang, Chein-Wei Jen
ASAP
2007
IEEE
130views Hardware» more  ASAP 2007»
14 years 20 days ago
A Self-Reconfigurable Implementation of the JPEG Encoder
Dynamic reconfiguration allows to selectively substitute blocks of logic at run-time in order to improve the area efficiency of a FPGA design. This paper presents the design of a ...
Antonino Tumeo, Matteo Monchiero, Gianluca Palermo...
CLUSTER
2008
IEEE
13 years 10 months ago
Improving message passing over Ethernet with I/OAT copy offload in Open-MX
Abstract--Open-MX is a new message passing layer implemented on top of the generic Ethernet stack of the Linux kernel. Open-MX works on all Ethernet hardware, but it suffers from e...
Brice Goglin
HPDC
1999
IEEE
14 years 29 days ago
Using Embedded Network Processors to Implement Global Memory Management in a Workstation Cluster
Advances in network technology continue to improve the communication performance of workstation and PC clusters, making high-performance workstation-clustercomputing increasingly ...
Yvonne Coady, Joon Suan Ong, Michael J. Feeley
ITNG
2010
IEEE
13 years 7 months ago
Record Setting Software Implementation of DES Using CUDA
—The increase in computational power of off-the-shelf hardware offers more and more advantageous tradeoffs among efficiency, cost and availability, thus enhancing the feasibil...
Giovanni Agosta, Alessandro Barenghi, Fabrizio De ...