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» Improving SHA-2 Hardware Implementations
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TOOLS
2009
IEEE
14 years 3 months ago
PyGirl: Generating Whole-System VMs from High-Level Prototypes Using PyPy
Abstract. Virtual machines (VMs) emulating hardware devices are generally implemented in low-level languages for performance reasons. This results in unmaintainable systems that ar...
Camillo Bruni, Toon Verwaest
ASPDAC
2000
ACM
92views Hardware» more  ASPDAC 2000»
14 years 1 months ago
Co-synthesis with custom ASICs
- This paper introduces the first hardwarekoftware co-synthesis algorithm that optimizes the implementations of ASICs that are used as processing elements for the embedded systems....
Yuan Xie, Wayne Wolf
ASAP
2011
IEEE
228views Hardware» more  ASAP 2011»
12 years 8 months ago
A high-performance, low-power linear algebra core
—Achieving high-performance while reducing power consumption is a key concern as technology scaling is reaching its limits. It is well-accepted that application-specific custom ...
Ardavan Pedram, Andreas Gerstlauer, Robert A. van ...
ITC
2000
IEEE
101views Hardware» more  ITC 2000»
14 years 1 months ago
Deterministic partitioning techniques for fault diagnosis in scan-based BIST
A deterministic partitioning technique for fault diagnosis in Scan-Based BIST is proposed. Properties of high quality partitions for improved fault diagnosis times are identified...
Ismet Bayraktaroglu, Alex Orailoglu
ARC
2008
Springer
99views Hardware» more  ARC 2008»
13 years 10 months ago
Accelerating Speculative Execution in High-Level Synthesis with Cancel Tokens
We present an improved method for scheduling speculative data paths which relies on cancel tokens to undo computations in misspeculated paths. Performancewise, this method is consi...
Hagen Gädke, Andreas Koch