Sciweavers

1503 search results - page 250 / 301
» Improving Student Performance Using Self-Assessment Tests
Sort
View
SIGCOMM
2009
ACM
14 years 2 months ago
SmartRE: an architecture for coordinated network-wide redundancy elimination
Application-independent Redundancy Elimination (RE), or identifying and removing repeated content from network transfers, has been used with great success for improving network pe...
Ashok Anand, Vyas Sekar, Aditya Akella
DATE
2006
IEEE
152views Hardware» more  DATE 2006»
14 years 1 months ago
Adaptive chip-package thermal analysis for synthesis and design
Ever-increasing integrated circuit (IC) power densities and peak temperatures threaten reliability, performance, and economical cooling. To address these challenges, thermal analy...
Yonghong Yang, Zhenyu (Peter) Gu, Changyun Zhu, Li...
INFOCOM
2002
IEEE
14 years 19 days ago
Topologically-Aware Overlay Construction and Server Selection
— A number of large-scale distributed Internet applications could potentially benefit from some level of knowledge about the relative proximity between its participating host no...
Sylvia Ratnasamy, Mark Handley, Richard M. Karp, S...
AIEDAM
2007
191views more  AIEDAM 2007»
13 years 7 months ago
Ontology-based design information extraction and retrieval
Because of the increasing complexity of products and the design process, as well as the popularity of computer-aided documentation tools, the number of electronic and textual desi...
Zhanjun Li, Karthik Ramani
FPGA
1995
ACM
93views FPGA» more  FPGA 1995»
13 years 11 months ago
Simultaneous Depth and Area Minimization in LUT-based FPGA Mapping
In this paper, we present an improvement of the FlowMap algorithm, named CutMap, which combines depth and area minimization in the mapping process by computing min-cost min-height...
Jason Cong, Yean-Yow Hwang