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TAPIA
2005
ACM
14 years 1 months ago
Towards a cross-platform microbenchmark suite for evaluating hardware performance counter data
As useful as performance counters are, the meaning of reported aggregate event counts is sometimes questionable. Questions arise due to unanticipated processor behavior, overhead ...
Roberto Araiza, Maria Gabriela Aguilera, Thientam ...
FPT
2005
IEEE
181views Hardware» more  FPT 2005»
14 years 1 months ago
Hardware-Accelerated SSH on Self-Reconfigurable Systems
The performance of security applications can be greatly improved by accelerating the cryptographic algorithms in hardware. In this paper, an implementation of the Secure Shell (SS...
Ivan Gonzalez, Francisco J. Gomez-Arribas, Sergio ...
MICRO
2009
IEEE
148views Hardware» more  MICRO 2009»
14 years 2 months ago
Flip-N-Write: a simple deterministic technique to improve PRAM write performance, energy and endurance
The phase-change random access memory (PRAM) technology is fast maturing to production levels. Main advantages of PRAM are non-volatility, byte addressability, in-place programmab...
Sangyeun Cho, Hyunjin Lee
DATE
2004
IEEE
136views Hardware» more  DATE 2004»
13 years 11 months ago
Data Windows: A Data-Centric Approach for Query Execution in Memory-Resident Databases
Structured embedded databases are currently becoming an integrated part of embedded systems, thus, enabling higher standards in system automation. These embedded databases are typ...
Jayaprakash Pisharath, Alok N. Choudhary, Mahmut T...
ICCAD
2006
IEEE
125views Hardware» more  ICCAD 2006»
14 years 4 months ago
Performances improvement of FPGA using novel multilevel hierarchical interconnection structure
This paper presents a new Multilevel hierarchical FPGA (MFPGA) architecture that unifies two unidirectional programmable networks: A predictible downward network based on the But...
Hayder Mrabet, Zied Marrakchi, Pierre Souillot, Ha...