5523 search results - page 17 / 1105 » Improving application performance with hardware data structu... |
ET
2002
13 years 7 months ago
2002
In this paper we explore two alternative approaches to system diagnosis. The first strategy is based on testability analysis performed by SATAN tool. The second approach performed ...
ISLPED
2003
ACM
14 years 26 days ago
2003
ACM
A new architectural technique to reduce power dissipation in data caches is proposed. In multimedia applications, a major portion of data cache accesses hit in the same cache set ...
HPCA
2003
IEEE
14 years 8 months ago
2003
IEEE
To continue to improve processor performance, microarchitects seek to increase the effective instruction level parallelism (ILP) that can be exploited in applications. A fundament...
MICRO
1994
IEEE
13 years 11 months ago
1994
IEEE
We examine two pipeline structures which are employed in commercial microprocessors. The first is the load-use interlock (LUI) pipeline, which employs an interlock to ensure corre...
ICPP
1999
IEEE
13 years 12 months ago
1999
IEEE
On-line transaction processing exhibits poor memory behavior in high-end multiprocessor servers because of complex sharing patterns and substantial interaction between the databas...