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WETICE
1997
IEEE
13 years 12 months ago
Capturing Geometry Rationale for Collaborative Design
When an artifact is designed the typical output consists of documents describing the final result of a long series of deliberations and tradeoffs by the participants of collaborat...
Mark Klein
ISLPED
1997
ACM
108views Hardware» more  ISLPED 1997»
13 years 12 months ago
Techniques for low energy software
The energy consumption of a system depends upon the hardware and software component of a system. Since it is the software which drives the hardware in most systems, decisions take...
Huzefa Mehta, Robert Michael Owens, Mary Jane Irwi...
EURODAC
1994
IEEE
127views VHDL» more  EURODAC 1994»
13 years 11 months ago
Optimal equivalent circuits for interconnect delay calculations using moments
In performance-driven interconnect design, delay estimators are used to determine both the topology and the layout of good routing trees. We address the class of moment-matching, ...
Sudhakar Muddu, Andrew B. Kahng
ICDE
1993
IEEE
158views Database» more  ICDE 1993»
13 years 11 months ago
Unification of Temporal Data Models
To add time su port to the relational model, both first normal form (fNF and non-INF appmches have maining within 1NF when time support is added may introduce data redundancy. The...
Christian S. Jensen, Michael D. Soo, Richard T. Sn...
ICCAD
1994
IEEE
131views Hardware» more  ICCAD 1994»
13 years 11 months ago
Edge-map: optimal performance driven technology mapping for iterative LUT based FPGA designs
We consider the problem of performance driven lookup-table (LUT) based technology mapping for FPGAs using a general delay model. In the general delay model, each interconnection e...
Hannah Honghua Yang, D. F. Wong
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