1001 search results - page 5 / 201 » Improving memory hierarchy performance for irregular applica... |
GLVLSI
2009
IEEE
13 years 11 months ago
2009
IEEE
Modern embedded devices (e.g., PDAs, mobile phones) are now incorporating Java as a very popular implementation language in their designs. These new embedded systems include multi...
HPCA
2000
IEEE
13 years 12 months ago
2000
IEEE
Prefetching offers the potential to improve the performance of linked data structure (LDS) traversals. However, previously proposed prefetching methods only work well when there i...
ISCA
2010
IEEE
14 years 19 days ago
2010
IEEE
Next generation tiled microarchitectures are going to be limited by off-chip misses and by on-chip network usage. Furthermore, these platforms will run an heterogeneous mix of ap...
ASPDAC
2006
ACM
14 years 1 months ago
2006
ACM
— An effectively designed and efficiently used memory hierarchy, composed of scratch-pads or cache, is seen today as the key to obtaining energy and performance gains in data-do...
GECCO
2009
Springer
13 years 5 months ago
2009
Springer
Simultaneous Multithreading (SMT) is a technology aimed at improving the throughput of the processor core by applying Instruction Level Parallelism (ILP) and Thread Level Parallel...