Sciweavers

229 search results - page 34 / 46
» Improving the Build Architecture of Legacy C C Software Sy...
Sort
View
ISCA
2009
IEEE
318views Hardware» more  ISCA 2009»
14 years 3 months ago
Thread criticality predictors for dynamic performance, power, and resource management in chip multiprocessors
With the shift towards chip multiprocessors (CMPs), exploiting and managing parallelism has become a central problem in computer systems. Many issues of parallelism management boi...
Abhishek Bhattacharjee, Margaret Martonosi
TASE
2008
IEEE
13 years 8 months ago
An Intelligent Online Monitoring and Diagnostic System for Manufacturing Automation
Condition monitoring and fault diagnosis in modern manufacturing automation is of great practical significance. It improves quality and productivity, and prevents damage to machine...
Ming Ge, Yangsheng Xu, Ruxu Du
EMSOFT
2004
Springer
14 years 2 months ago
Towards direct execution of esterel programs on reactive processors
Esterel is a system-level language for the modelling, verification and synthesis of control dominated (reactive) embedded systems. Existing Esterel compilers generate intermediat...
Partha S. Roop, Zoran A. Salcic, M. W. Sajeewa Day...
CODES
2004
IEEE
14 years 22 days ago
A loop accelerator for low power embedded VLIW processors
The high transistor density afforded by modern VLSI processes have enabled the design of embedded processors that use clustered execution units to deliver high levels of performan...
Binu K. Mathew, Al Davis
MSWIM
2005
ACM
14 years 2 months ago
Huginn: a 3D visualizer for wireless ns-2 traces
Discrete-event network simulation is a major tool for the research and development of mobile ad-hoc networks (MANETs). These simulations are used for debugging, teaching, understa...
Björn Scheuermann, Holger Füßler, ...