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» Improving the Proportion of At-Speed Tests in Scan BIST
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ISLPED
2005
ACM
68views Hardware» more  ISLPED 2005»
14 years 1 months ago
Two efficient methods to reduce power and testing time
Reducing power dissipation and testing time is accomplished by forming two clusters of don’t-care bit inside an input and a response test cube. New reordering scheme of scan lat...
Il-soo Lee, Tony Ambler