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VIS
2004
IEEE
134views Visualization» more  VIS 2004»
14 years 9 months ago
Projecting Tetrahedra without Rendering Artifacts
Hardware-accelerated direct volume rendering of unstructured volumetric meshes is often based on tetrahedral cell projection, in particular, the Projected Tetrahedra (PT) algorith...
David S. Ebert, Martin Kraus, Wei Qiao
COMPGEOM
2006
ACM
14 years 1 months ago
Engineering a compact parallel delaunay algorithm in 3D
We describe an implementation of a compact parallel algorithm for 3D Delaunay tetrahedralization on a 64-processor shared-memory machine. Our algorithm uses a concurrent version o...
Daniel K. Blandford, Guy E. Blelloch, Clemens Kado...
IEEEPACT
2000
IEEE
14 years 3 days ago
Exploring the Limits of Sub-Word Level Parallelism
Multimedia instruction set extensions have become a prominent feature in desktop microprocessor platforms, promising superior performance on a wide range of floating-point and int...
Kevin Scott, Jack W. Davidson
CF
2008
ACM
13 years 9 months ago
DMA-based prefetching for i/o-intensive workloads on the cell architecture
Recent advent of the asymmetric multi-core processors such as Cell Broadband Engine (Cell/BE) has popularized the use of heterogeneous architectures. A growing body of research is...
M. Mustafa Rafique, Ali Raza Butt, Dimitrios S. Ni...
DATE
2004
IEEE
107views Hardware» more  DATE 2004»
13 years 11 months ago
A Partitioning Methodology for Accelerating Applications in Hybrid Reconfigurable Platforms
In this paper, we propose a methodology for partitioning and mapping computational intensive applications in reconfigurable hardware blocks of different granularity. A generic hyb...
Michalis D. Galanis, Athanasios Milidonis, George ...