122 search results - page 9 / 25 » In Situ Design of Register Operations |
DAC
1997
ACM
14 years 1 months ago
1997
ACM
—Many application-specific architectures provide indirect addressing modes with auto-increment/decrement arithmetic. Since these architectures generally do not feature an indexe...
FSE
2005
Springer
14 years 3 months ago
2005
Springer
In this paper we present a new class of stream ciphers based on a very simple mechanism. The heart of our method is a Feedback with Carry Shift Registers (FCSR) automaton. This au...
PPOPP
2003
ACM
14 years 2 months ago
2003
ACM
Sensor networks are long-running computer systems with many sensing/compute nodes working to gather information about their environment, process and fuse that information, and in ...
CF
2009
ACM
14 years 4 months ago
2009
ACM
Recently, multi-core architectures with alternative memory subsystem designs have emerged. Instead of using hardwaremanaged cache hierarchies, they employ software-managed embedde...
CODES
2007
IEEE
14 years 4 months ago
2007
IEEE
This paper proposes a low power VLIW processor generation method by automatically extracting non-redundant activation conditions of pipeline registers for clock gating. It is impo...