Transactional Coherence and Consistency (TCC) is a novel coherence scheme for shared memory multiprocessors that uses programmer-defined transactions as the fundamental unit of p...
Software distributed shared memory (DSM) techniques, while effective on applications with coarse-grained sharing, yield poor performance for the fine-grained sharing encountered i...
Ring interconnects may be an attractive solution for future chip multiprocessors because they can enable faster links than buses and simpler switches than arbitrary switched inter...
The lazy caching algorithm of Afek, Brown, and Merrit (1993) is a protocol that allows the use of local caches with delayed updates. It results in a memory model that is not atomi...
Abstract—In order to harness the full compute power of manycore processors, future designs must focus on effective utilization of on-chip cache and bandwidth resources. In this p...
Hemayet Hossain, Sandhya Dwarkadas, Michael C. Hua...