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ISHPC
1999
Springer
13 years 12 months ago
Utilization of Cache Area in On-Chip Multiprocessor
On-chip multiprocessor can be an alternative to the wide-issue superscalar processor approach which is currently the mainstream to exploit the increasing number of transistors on ...
Hitoshi Oi, N. Ranganathan
FPL
2007
Springer
97views Hardware» more  FPL 2007»
13 years 11 months ago
An FPGA Approach to Quantifying Coherence Traffic Efficiency on Multiprocessor Systems
Recently, there is a surge of interests in using FPGAs for computer architecture research including applications from emulating and analyzing a new platform to accelerating microa...
Taeweon Suh, Shih-Lien Lu, Hsien-Hsin S. Lee
IPPS
2010
IEEE
13 years 5 months ago
Multicore-aware reuse distance analysis
This paper presents and validates methods to extend reuse distance analysis of application locality characteristics to shared-memory multicore platforms by accounting for invalidat...
Derek L. Schuff, Benjamin S. Parsons, Vijay S. Pai
CGI
2004
IEEE
13 years 11 months ago
Exploiting Temporal Coherence in Final Gathering for Dynamic Scenes
Efficient global illumination computation in dynamically changing environments is an important practical problem. In high-quality animation rendering costly "final gathering&...
Takehiro Tawara, Karol Myszkowski, Hans-Peter Seid...
IPPS
2007
IEEE
14 years 1 months ago
An Implementation and Evaluation of Client-Side File Caching for MPI-IO
Client-side file caching has long been recognized as a file system enhancement to reduce the amount of data transfer between application processes and I/O servers. However, cach...
Wei-keng Liao, Avery Ching, Kenin Coloma, Alok N. ...