Synchronous circuits are typically clocked considering worst case timing paths so that timing errors are avoided under all circumstances. In the case of a pipelined processor, thi...
Viswanathan Subramanian, Mikel Bezdek, Naga Durga ...
Register files are in the critical path of most high-performance processors and their latency is one of the most important factors that limit their size. Our goal is to develop er...
Gokhan Memik, Masud H. Chowdhury, Arindam Mallik, ...
—Disk scrubbing periodically scans the contents of a disk array to detect the presence of irrecoverable read errors and reconstitute the contents of the lost blocks using the bui...
We consider a Gaussian two-hop network where the source and the destination can communicate only via a relay node who is both an eavesdropper and a Byzantine adversary. Both the s...
In this paper, we consider the design of a policy-based routing system and the role that link state might play. Looking at the problem from a link-state perspective, we propose Ce...