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ITNG
2007
IEEE
14 years 1 months ago
FPGA-based Vector Processing for Matrix Operations
A programmable vector processor and its implementation with a field-programmable gate array (FPGA) are presented. This processor is composed of a vector core and a tightly couple...
Hongyan Yang, Sotirios G. Ziavras, Jie Hu
IPPS
1998
IEEE
13 years 11 months ago
Design and Implementation of a Parallel I/O Runtime System for Irregular Applications
In this paper we present the design, implementation and evaluation of a runtime system based on collective I/O techniques for irregular applications. We present two models, namely...
Jaechun No, Sung-Soon Park, Jesús Carretero...
ISCAPDCS
2008
13 years 8 months ago
Implementation of 802.11n on 128-CORE Processor
This article presents the results of a research in applying modern Graphics Processing Units in the field of telecommunications. The most recent Wireless Local Area Network protoc...
A. Akapyev, V. Krylov
PLDI
1998
ACM
13 years 11 months ago
Improving Performance by Branch Reordering
The conditional branch has long been considered an expensive operation. The relative cost of conditional branches has increased as recently designed machines are now relying on de...
Minghui Yang, Gang-Ryung Uh, David B. Whalley
ISCA
2003
IEEE
157views Hardware» more  ISCA 2003»
14 years 20 days ago
Pipeline Damping: A Microarchitectural Technique to Reduce Inductive Noise in Supply Voltage
Scaling of CMOS technology causes the power supply voltages to fall and supply currents to rise at the same time as operating speeds are increasing. Falling supply voltages cause ...
Michael D. Powell, T. N. Vijaykumar