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ISQED
2010
IEEE
141views Hardware» more  ISQED 2010»
14 years 2 months ago
Assessing chip-level impact of double patterning lithography
—Double patterning lithography (DPL) provides an attractive alternative or a supplementary method to enable the 32nm and 22nm process nodes, relative to costlier technology optio...
Kwangok Jeong, Andrew B. Kahng, Rasit Onur Topalog...
LCN
2006
IEEE
14 years 1 months ago
Wireless Sensor Networks: The Quest for Planetary Field Sensing
— The paper presents a thought experiment as to the feasibility of using large scale wireless sensor networks as a vehicle for high level scientific investigation. The discussion...
Elena I. Gaura, Robert M. Newman
PLDI
2012
ACM
11 years 9 months ago
Diderot: a parallel DSL for image analysis and visualization
Research scientists and medical professionals use imaging technology, such as computed tomography (CT) and magnetic resonance imaging (MRI) to measure a wide variety of biological...
Charisee Chiw, Gordon Kindlmann, John Reppy, Lamon...
CSEE
2007
Springer
14 years 1 months ago
Towards a European Master Programme on Global Software Engineering
This paper presents a European Master programme on Global Software Engineering (SE), being put forward by four leading institutions from Sweden, UK, Netherlands and Italy. The Glo...
Patricia Lago, Henry Muccini, Ljerka Beus-Dukic, I...
IPPS
1997
IEEE
13 years 11 months ago
A Tool for On-line Visualization and Interactive Steering of Parallel HPC Applications
Tools for parallel systems today range from specification over debugging to performance analysis and more. Typically, they help the programmers of parallel algorithms from the ea...
Sabine Rathmayer