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» Incremental formal design verification
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SIGSOFT
2005
ACM
14 years 8 months ago
Dynamically discovering architectures with DiscoTect
One of the challenges for software architects is ensuring that an implemented system faithfully represents its architecture. We describe and demonstrate a tool, called DiscoTect, ...
Bradley R. Schmerl, David Garlan, Hong Yan
GLVLSI
2007
IEEE
141views VLSI» more  GLVLSI 2007»
13 years 11 months ago
A synchronization algorithm for local temporal refinements in perfectly synchronous models with nested feedback loops
he abstract and simple computation and communication mechanism in the synchronous computational model it is easy to simulate synchronous systems and to apply formal verification m...
Tarvo Raudvere, Ingo Sander, Axel Jantsch
DAC
1998
ACM
14 years 8 months ago
Approximation and Decomposition of Binary Decision Diagrams
Efficient techniques for the manipulation of Binary Decision Diagrams (BDDs) are key to the success of formal verification tools. Recent advances in reachability analysis and mode...
Kavita Ravi, Kenneth L. McMillan, Thomas R. Shiple...
DAC
2006
ACM
14 years 8 months ago
Symmetry detection for large Boolean functions using circuit representation, simulation, and satisfiability
- Classical two-variable symmetries play an important role in many EDA applications, ranging from logic synthesis to formal verification. This paper proposes a complete circuit-bas...
Jin S. Zhang, Alan Mishchenko, Robert K. Brayton, ...
ATAL
2010
Springer
13 years 8 months ago
Can we predict safety culture?
Safety culture is broadly recognized as important for Air Traffic Management and various studies have addressed its characterization and assessment. Nevertheless, relations betwee...
Alexei Sharpanskykh, Sybert H. Stroeve