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» Influence of compiler optimizations on system power
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ACSAC
2009
IEEE
14 years 2 months ago
Detecting Software Theft via System Call Based Birthmarks
—Along with the burst of open source projects, software theft (or plagiarism) has become a very serious threat to the healthiness of software industry. Software birthmark, which ...
Xinran Wang, Yoon-chan Jhi, Sencun Zhu, Peng Liu
ISLPED
2004
ACM
139views Hardware» more  ISLPED 2004»
14 years 24 days ago
Eliminating voltage emergencies via microarchitectural voltage control feedback and dynamic optimization
Microprocessor designers use techniques such as clock gating to reduce power dissipation. An unfortunate side-effect of these techniques is the processor current fluctuations th...
Kim M. Hazelwood, David Brooks
IEEEPACT
2002
IEEE
14 years 9 days ago
Optimizing Loop Performance for Clustered VLIW Architectures
Modern embedded systems often require high degrees of instruction-level parallelism (ILP) within strict constraints on power consumption and chip cost. Unfortunately, a high-perfo...
Yi Qian, Steve Carr, Philip H. Sweany
LCPC
2005
Springer
14 years 26 days ago
A Language for the Compact Representation of Multiple Program Versions
Abstract. As processor complexity increases compilers tend to deliver suboptimal performance. Library generators such as ATLAS, FFTW and SPIRAL overcome this issue by empirically s...
Sébastien Donadio, James C. Brodman, Thomas...
ICCAD
2008
IEEE
153views Hardware» more  ICCAD 2008»
14 years 4 months ago
SPM management using Markov chain based data access prediction
— Leveraging the power of scratchpad memories (SPMs) available in most embedded systems today is crucial to extract maximum performance from application programs. While regular a...
Taylan Yemliha, Shekhar Srikantaiah, Mahmut T. Kan...