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» Influence of compiler optimizations on system power
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LCPC
2005
Springer
14 years 26 days ago
Scalable Array SSA and Array Data Flow Analysis
Static Single Assignment (SSA) has been widely accepted as the intermediate program representation of choice in most modern compilers. It allows for a much more efficient data flo...
Silvius Rus, Guobin He, Lawrence Rauchwerger
EMSOFT
2005
Springer
14 years 27 days ago
Using de-optimization to re-optimize code
The nature of embedded systems development places a great deal of importance on meeting strict requirements in areas such as static code size, power consumption, and execution tim...
Stephen Hines, Prasad Kulkarni, David B. Whalley, ...
IEEECIT
2006
IEEE
14 years 1 months ago
Design of a Reliable NAND Flash Software for Mobile Device
Flash memory in various embedded systems such as the backing memory is frequently used in an active type of RFID reader. Because batteries are used in a shifting environment and s...
TaeHoon Kim, KwangMu Shin, TaeHoon Lee, KiDong Jun...
DAC
2007
ACM
14 years 8 months ago
A Self-Tuning Configurable Cache
The memory hierarchy of a system can consume up to 50% of microprocessor system power. Previous work has shown that tuning a configurable cache to a particular application can red...
Ann Gordon-Ross, Frank Vahid
DAC
2006
ACM
14 years 8 months ago
An efficient and versatile scheduling algorithm based on SDC formulation
Scheduling plays a central role in the behavioral synthesis process, which automatically compiles high-level specifications into optimized hardware implementations. However, most ...
Jason Cong, Zhiru Zhang