- One of the critical issues in MTCMOS design is how to estimate a circuit delay quickly. In this paper, we propose a delay modeling and static timing analysis (STA) methodology ta...
An optimization method is introduced for generating minimum-length test sequences taking into account timing constraints for FSM models of communication protocols. Due to active t...
gn process of embedded systems moves currently towards higher levels of abstraction. As a consequence, a need arises for an early and realistic assessment of system level design d...
in Progress – Extended Abstract Word count: 3124 Effectively managing IT service centers such as call centers, computerized diagnostic imaging facilities, data centers, e-commerc...
The increasing complexity and size of system level design models introduces a difficult challenge for validating them. Hence, in most industries, design validation takes a large p...
David Berner, Hiren D. Patel, Deepak Mathaikutty, ...