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FPGA
2010
ACM
243views FPGA» more  FPGA 2010»
14 years 4 months ago
Bit-level optimization for high-level synthesis and FPGA-based acceleration
d hardware design from behavior-level abstraction has drawn wide interest in FPGA-based acceleration and configurable computing research field. However, for many high-level progra...
Jiyu Zhang, Zhiru Zhang, Sheng Zhou, Mingxing Tan,...
LION
2009
Springer
115views Optimization» more  LION 2009»
14 years 2 months ago
Flexible Stochastic Local Search for Haplotype Inference
Abstract. Haplotype Inference is a challenging problem in bioinformatics that consists in inferring the basic genetic constitution of diploid organisms on the basis of their genoty...
Luca Di Gaspero, Andrea Roli
CODES
2006
IEEE
14 years 1 months ago
Thermal-aware high-level synthesis based on network flow method
Lowering down the chip temperature is becoming one of the important design considerations, since temperature adversely and seriously affects many of design qualities, such as reli...
Pilok Lim, Taewhan Kim
ICCAD
1998
IEEE
153views Hardware» more  ICCAD 1998»
13 years 12 months ago
Intellectual property protection by watermarking combinational logic synthesis solutions
The intellectual property (IP) business model is vulnerable to a number of potentially devastating obstructions, such as misappropriation and intellectual property fraud. We propo...
Darko Kirovski, Yean-Yow Hwang, Miodrag Potkonjak,...
OL
2007
103views more  OL 2007»
13 years 7 months ago
Support vector machine via nonlinear rescaling method
In this paper we construct the linear support vector machine (SVM) based on the nonlinear rescaling (NR) methodology (see [9, 11, 10] and references therein). The formulation of t...
Roman A. Polyak, Shen-Shyang Ho, Igor Griva