Thermal-aware high-level synthesis based on network flow method

Lowering down the chip temperature is becoming one of the important design considerations, since temperature adversely and seriously affects many of design qualities, such as reliability, performance and leakage power of chip, and also increases the packaging cost. In this work, we address a new problem of thermal-aware module binding in high-level synthesis, in which the objective is to minimize the peak temperature of the chip. The two key contributions are (1) to solve the binding problem with the primary objective of minimizing the ‘peak’ switched capacitance of modules and the secondary objective of minimizing the ‘total’ switched capacitance of modules and (2) to control the switched capacitances with respect to the floorplan of modules in a way to minimize the ‘peak’ heat diffusion between modules. For (1), our proposed thermal-aware binding algorithm, called TA-b, formulates the thermal-aware binding problem into a problem of repeated utilization of network flow ...

• Type: Conference
• Year: 2006
• Where: CODES
• Authors: Pilok Lim, Taewhan Kim
• Keywords: Binding Problem, CODES 2006, Hardware-Software Codesign, Important Design Considerations, Thermal-aware Module Binding