Sciweavers

386 search results - page 37 / 78
» Informing Memory Operations: Providing Memory Performance Fe...
Sort
View
HPCA
2004
IEEE
14 years 9 months ago
Out-of-Order Commit Processors
Modern out-of-order processors tolerate long latency memory operations by supporting a large number of inflight instructions. This is particularly useful in numerical applications...
Adrián Cristal, Daniel Ortega, Josep Llosa,...
SIGMETRICS
2005
ACM
120views Hardware» more  SIGMETRICS 2005»
14 years 2 months ago
Automatic measurement of memory hierarchy parameters
The running time of many applications is dominated by the cost of memory operations. To optimize such applications for a given platform, it is necessary to have a detailed knowled...
Kamen Yotov, Keshav Pingali, Paul Stodghill
ASPLOS
2004
ACM
14 years 2 months ago
Secure program execution via dynamic information flow tracking
Dynamic information flow tracking is a hardware mechanism to protect programs against malicious attacks by identifying spurious information flows and restricting the usage of sp...
G. Edward Suh, Jae W. Lee, David Zhang, Srinivas D...
POPL
1999
ACM
14 years 1 months ago
Typed Memory Management in a Calculus of Capabilities
An increasing number of systems rely on programming language technology to ensure safety and security of low-level code. Unfortunately, these systems typically rely on a complex, ...
Karl Crary, David Walker, J. Gregory Morrisett
DAC
2008
ACM
14 years 9 months ago
A power and temperature aware DRAM architecture
Technological advances enable modern processors to utilize increasingly larger DRAMs with rising access frequencies. This is leading to high power consumption and operating temper...
Song Liu, Seda Ogrenci Memik, Yu Zhang, Gokhan Mem...