1192 search results - page 11 / 239 » Instruction Level Distributed Processing |
IEEEPACT
1999
IEEE
13 years 11 months ago
1999
IEEE
Increases in instruction level parallelism are needed to exploit the potential parallelism available in future wide issue architectures. Predicated execution is an architectural m...
IPPS
2006
IEEE
14 years 22 days ago
2006
IEEE
By coupling a reconfigurable hardware to a standard processor, high levels of flexibility and adaptability are achieved. However, this approach requires modifications to the compi...
TVLSI
2002
13 years 6 months ago
2002
This paper presents the development of instruction analysis/scheduling CAD techniques to measure the distribution of functional unit usage and the micro operation level parallelis...
IPPS
2002
IEEE
13 years 11 months ago
2002
IEEE
Short vector SIMD instructions on recent microprocessors, such as SSE on Pentium III and 4, speed up code but are a major challenge to software developers. We present a compiler t...
ISSS
1996
IEEE
13 years 11 months ago
1996
IEEE
The application range of the embedded computing is going to cover the majority of the market products spanning from consumer electronic, automotive, telecom and process control. F...