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IPPS
2006
IEEE
14 years 22 days ago
Selection of instruction set extensions for an FPGA embedded processor core
A design process is presented for the selection of a set of instruction set extensions for the PowerPC 405 processor that is embedded into the Xilinx Virtex Family of FPGAs. The i...
Brian F. Veale, John K. Antonio, Monte P. Tull, S....
HPCA
2007
IEEE
14 years 7 months ago
A Memory-Level Parallelism Aware Fetch Policy for SMT Processors
A thread executing on a simultaneous multithreading (SMT) processor that experiences a long-latency load will eventually stall while holding execution resources. Existing long-lat...
Stijn Eyerman, Lieven Eeckhout
SIGCSE
2006
ACM
146views Education» more  SIGCSE 2006»
14 years 20 days ago
'Programming language paradigms' instruction through designing a new paradigm
Undergraduate and master’s students enrolled in a programming language paradigms class are given the assignment to design a new programming language paradigm. The students are a...
Hilda M. Standley
IADIS
2003
13 years 8 months ago
Knowledge Acquisition Strategies and Navigation in Hypermedia Learning Environments: THe Influence of Instructional Design Prope
In order to understand and enhance the value of new media in education it is necessary to develop criteria for the evaluation of the effectiveness of learning with hypermedia envi...
Mattias Steinke, Thomas Huk, Christian Floto
PROCEDIA
2010
78views more  PROCEDIA 2010»
13 years 5 months ago
Numerical solution of level dependent quasi-birth-and-death processes
We consider the numerical computation of stationary distributions for level dependent quasi-birth-and-death processes. An algorithm based on matrix continued fractions is presente...
Hendrik Baumann, Werner Sandmann