1192 search results - page 9 / 239 » Instruction Level Distributed Processing |
IEEEPACT
2005
IEEE
14 years 9 days ago
2005
IEEE
VLIW architectures are popular in embedded systems because they offer high-performance processing at low cost and energy. The major problem with traditional VLIW designs is that t...
HPCA
2002
IEEE
14 years 7 months ago
2002
IEEE
Thread-Level Speculation (TLS) allows us to automatically parallelize general-purpose programs by supporting parallel execution of threads that might not actually be independent. ...
ASPLOS
2006
ACM
13 years 10 months ago
2006
ACM
This paper explores hierarchical instruction scheduling for a tiled processor. Our results show that at the top level of the hierarchy, a simple profile-driven algorithm effective...
EDOC
2006
IEEE
14 years 23 days ago
2006
IEEE
HPCA
2009
IEEE
14 years 7 months ago
2009
IEEE
Some instructions have more impact on processor performance than others. Identification of these critical instructions can be used to modify and improve instruction processing. Pr...