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DAC
1992
ACM
14 years 1 months ago
High Level Synthesis of Pipelined Instruction Set Processors and Back-End Compilers
Designing instruction set processors and constructing their compilers are mutually dependent tasks. Piper is a high level synthesis tool of ADAS which controls the hardware-softwa...
Ing-Jer Huang, Alvin M. Despain
IEEEPACT
2000
IEEE
14 years 2 months ago
Efficient Backtracking Instruction Schedulers
Santosh G. Abraham, Waleed Meleis, Ivan D. Baev
ISCAS
1999
IEEE
87views Hardware» more  ISCAS 1999»
14 years 2 months ago
Instruction level power model of microcontrollers
In the design of low power systems, it is important to analyze and optimize both the hardware and the software component of the system. To evaluate the software component of the s...
C. Chakrabarti, D. Gaitonde