2784 search results - page 57 / 557 » Instruction Level Parallelism |
IEEEPACT
2003
IEEE
14 years 3 months ago
2003
IEEE
Effective modeling and management of hardware resources have always been critical toward generating highly efficient code in static compilers. With Just-In-Time compilation and dy...
CASES
2006
ACM
14 years 3 months ago
2006
ACM
Microprocessor vendors have provided special-purpose instructions such as psadbw and pdist to accelerate the sumof-absolute differences (SAD) similarity measurement. The usefulne...
IPPS
2006
IEEE
14 years 4 months ago
2006
IEEE
A design process is presented for the selection of a set of instruction set extensions for the PowerPC 405 processor that is embedded into the Xilinx Virtex Family of FPGAs. The i...
IPPS
2000
IEEE
14 years 2 months ago
2000
IEEE
The instruction sets of general-purpose microprocessors are designed to offer good performance across a wide range of programs. The size and complexity of the instruction sets, how...
ISCAS
2006
IEEE
14 years 4 months ago
2006
IEEE
The H.264/AVC standard defines an in-loop de- instructions, available in current multimedia SIMD instruction blocking filter which is used in both the encoder and decoder. This set...