2784 search results - page 6 / 557 » Instruction Level Parallelism |
IEEEPACT
1999
IEEE
14 years 2 months ago
1999
IEEE
Increases in instruction level parallelism are needed to exploit the potential parallelism available in future wide issue architectures. Predicated execution is an architectural m...
HPCC
2009
Springer
14 years 2 months ago
2009
Springer
Usual cache optimisation techniques for high performance computing are difficult to apply in embedded VLIW applications. First, embedded applications are not always well structur...
ICPP
2000
IEEE
14 years 2 months ago
2000
IEEE
Recently, the practice of speculation in resolving data dependences has been studied as a means of extracting more instruction level parallelism (ILP). An outcome of an instructio...
APCSAC
2005
IEEE
14 years 3 months ago
2005
IEEE
In order to enhance the performance of a computer, most modern processors use superscalar architecture and raise the clock frequency. Superscalar architecture can execute more than...
IEEEPACT
2000
IEEE
14 years 2 months ago
2000
IEEE
Multimedia instruction set extensions have become a prominent feature in desktop microprocessor platforms, promising superior performance on a wide range of floating-point and int...