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» Instruction Level Parallelism
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140
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ENTCS
2006
133views more  ENTCS 2006»
15 years 2 months ago
A Compositional Natural Semantics and Hoare Logic for Low-Level Languages
The advent of proof-carrying code has generated significant interest in reasoning about low-level languages. It is widely believed that low-level languages with jumps must be diff...
Ando Saabas, Tarmo Uustalu
125
Voted
PPOPP
2009
ACM
16 years 3 months ago
Parallelization spectroscopy: analysis of thread-level parallelism in hpc programs
In this paper, we present a thorough analysis of thread-level parallelism available in production High Performance Computing (HPC) codes. We survey a number of techniques that are...
Arun Kejariwal, Calin Cascaval
125
Voted
IJCSA
2008
96views more  IJCSA 2008»
15 years 2 months ago
Integration of Educational Specifications and Standards to Support Adaptive Learning Scenarios in ADAPTAPlan
ADAPTAPlan project provides dynamic assistance for reducing authors' effort in developing instructional design tasks using user modelling, planning and machine learning techn...
Silvia Baldiris, Olga C. Santos, Carmen Barrera, J...
120
Voted
ISHPC
2000
Springer
15 years 6 months ago
Limits of Task-Based Parallelism in Irregular Applications
Traditional parallel compilers do not effectively parallelize irregular applications because they contain little looplevel parallelism due to ambiguous memory references. We explo...
Barbara Kreaseck, Dean M. Tullsen, Brad Calder
116
Voted
IEEEPACT
2009
IEEE
15 years 9 months ago
Architecture Support for Improving Bulk Memory Copying and Initialization Performance
—Bulk memory copying and initialization is one of the most ubiquitous operations performed in current computer systems by both user applications and Operating Systems. While many...
Xiaowei Jiang, Yan Solihin, Li Zhao, Ravishankar I...