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JUCS
2008
123views more  JUCS 2008»
13 years 7 months ago
Instruction Scheduling Based on Subgraph Isomorphism for a High Performance Computer Processor
: This paper1 presents an instruction scheduling algorithm based on the Subgraph Isomorphism Problem. Given a Directed Acyclic Graph (DAG) G1, our algorithm looks for a subgraph G2...
Ricardo Santos, Rodolfo Azevedo, Guido Araujo
VLSID
2008
IEEE
128views VLSI» more  VLSID 2008»
14 years 7 months ago
A Novel Approach to Compute Spatial Reuse in the Design of Custom Instructions
In the automatic design of custom instruction set processors, there can be a very large set of potential custom instructions, from which a few instructions are required to be chos...
Nagaraju Pothineni, Anshul Kumar, Kolin Paul
CASES
2008
ACM
13 years 9 months ago
Compiling custom instructions onto expression-grained reconfigurable architectures
While customizable processors aim at combining the flexibility of general purpose processors with the speed and power advantages of custom circuits, commercially available process...
Paolo Bonzini, Giovanni Ansaloni, Laura Pozzi
DAC
1992
ACM
13 years 11 months ago
High Level Synthesis of Pipelined Instruction Set Processors and Back-End Compilers
Designing instruction set processors and constructing their compilers are mutually dependent tasks. Piper is a high level synthesis tool of ADAS which controls the hardware-softwa...
Ing-Jer Huang, Alvin M. Despain
CLUSTER
2006
IEEE
13 years 7 months ago
A taxonomy of application scheduling tools for high performance cluster computing
Application scheduling plays an important role in high-performance cluster computing. Application scheduling can be classified as job scheduling and task scheduling. This paper pre...
Jiannong Cao, Alvin T. S. Chan, Yudong Sun, Sajal ...