138 search results - page 12 / 28 » Instruction Scheduling and Executable Editing |
ECRTS
2006
IEEE
14 years 2 months ago
2006
IEEE
Cache memories have been extensively used to bridge the gap between high speed processors and relatively slower main memories. However, they are sources of predictability problems...
ISQED
2009
IEEE
14 years 2 months ago
2009
IEEE
The advance in semiconductor technologies presents the serious problem of parameter variations. They affect threshold voltage of transistors and thus circuit delay has variability...
ASPLOS
2000
ACM
14 years 9 days ago
2000
ACM
Simultaneous Multithreading machines fetch and execute instructions from multiple instruction streams to increase system utilization and speedup the execution of jobs. When there ...
IEEEPACT
2007
IEEE
14 years 2 months ago
2007
IEEE
Continued scaling of CMOS technology to smaller transistor sizes makes modern processors more susceptible to both transient and permanent hardware faults. Circuitlevel techniques ...
ISLPED
2003
ACM
14 years 1 months ago
2003
ACM
This paper develops a technique that uniquely combines the advantages of static scheduling and dynamic scheduling to reduce the energy consumed in modern superscalar processors wi...