138 search results - page 21 / 28 » Instruction Scheduling and Executable Editing |
ICDIM
2010
IEEE
13 years 5 months ago
2010
IEEE
Funded as part of the `Network Enabled Platforms' program the Health Services Virtual Organization (HSVO) Project has developed a network-enabled platform (NEP) consisting of...
HPCA
2008
IEEE
14 years 8 months ago
2008
IEEE
Simultaneous Multithreading (SMT) attempts to keep a dynamically scheduled processor's resources busy with work from multiple independent threads. Threads with longlatency st...
MICRO
1997
IEEE
14 years 3 days ago
1997
IEEE
The multicluster architecture that we introduce offers a decentralized, dynamically-scheduled architecture, in which the register files, dispatch queue, and functional units of t...
DATE
2011
IEEE
12 years 11 months ago
2011
IEEE
Current processors are optimized for average case performance, often leading to a high worst-case execution time (WCET). Many architectural features that increase the average case...
ICPP
2008
IEEE
14 years 2 months ago
2008
IEEE
The issue queue (IQ) is a key microarchitecture structure for exploiting instruction-level and thread-level parallelism in dynamically scheduled simultaneous multithreaded (SMT) p...