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HPCN
1998
Springer
14 years 4 days ago
Dynamically Trace Scheduled VLIW Architectures
This paper presents a new architecture organisation, the dynamically trace scheduled VLIW (DTSVLIW), that can be used to implement machines that execute the code of current RISC o...
Alberto Ferreira de Souza, Peter Rounce
LCPC
1999
Springer
14 years 5 days ago
Instruction Scheduling in the Presence of Java's Runtime Exceptions
One of the challenges present to a Java compiler is Java’s frequent use of runtime exceptions. These exceptions affect performance directly by requiring explicit checks, as wel...
Matthew Arnold, Michael S. Hsiao, Ulrich Kremer, B...
ASAP
2009
IEEE
131views Hardware» more  ASAP 2009»
14 years 1 months ago
Constraint-Driven Instructions Selection and Application Scheduling in the DURASE system
This paper presents a new constraint-driven method for computational pattern selection, mapping and application scheduling using reconfigurable processor extensions. The presente...
Kevin Martin, Christophe Wolinski, Krzysztof Kuchc...
QEST
2006
IEEE
14 years 1 months ago
Continuous Bytecode Instruction Counting for CPU Consumption Estimation
As an execution platform, the Java Virtual Machine (JVM) provides many benefits in terms of portability and security. However, this advantage turns into an obstacle when it comes...
Andrea Camesi, Jarle Hulaas, Walter Binder
ISCA
1992
IEEE
151views Hardware» more  ISCA 1992»
13 years 12 months ago
An Elementary Processor Architecture with Simultaneous Instruction Issuing from Multiple Threads
In this paper, we propose a multithreaded processor architecture which improves machine throughput. In our processor architecture, instructions from different threads (not a singl...
Hiroaki Hirata, Kozo Kimura, Satoshi Nagamine, Yos...