Dynamically Trace Scheduled VLIW Architectures

This paper presents a new architecture organisation, the dynamically trace scheduled VLIW (DTSVLIW), that can be used to implement machines that execute the code of current RISC or CISC instruction set architectures in a VLIW fashion, with backward code compatibility.

• Type: Conference
• Year: 1998
• Where: HPCN
• Authors: Alberto Ferreira de Souza, Peter Rounce
• Keywords: Backward Code Compatibility, HPCN 1998, HPCN 1999, Instruction Set Architectures, Trace Scheduled Vliw