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IFIPPACT
1994
13 years 8 months ago
Microcode Generation for Flexible Parallel Target Architectures
: Advanced architectural features of microprocessors like instruction level parallelism and pipelined functional hardware units require code generation techniques beyond the scope ...
Rainer Leupers, Wolfgang Schenk, Peter Marwedel
LCTRTS
2009
Springer
14 years 1 months ago
Guaranteeing instruction fetch behavior with a lookahead instruction fetch engine (LIFE)
Instruction fetch behavior has been shown to be very regular and predictable, even for diverse application areas. In this work, we propose the Lookahead Instruction Fetch Engine (...
Stephen Roderick Hines, Yuval Peress, Peter Gavin,...
CASES
2010
ACM
13 years 4 months ago
Instruction selection by graph transformation
Common generated instruction selections are based on tree pattern matching, but modern and custom architectures feature instructions, which cannot be covered by trees. To overcome...
Sebastian Buchwald, Andreas Zwinkau
ISCA
2005
IEEE
128views Hardware» more  ISCA 2005»
14 years 14 days ago
An Evaluation Framework and Instruction Set Architecture for Ion-Trap Based Quantum Micro-Architectures
: The theoretical study of quantum computation has yielded efficient algorithms for some traditionally hard problems. Correspondingly, experimental work on the underlying physical...
Steven Balensiefer, Lucas Kreger-Stickles, Mark Os...
ASC
2004
13 years 6 months ago
Efficient fuzzy compiler for SIMD architectures
Abstract. This paper presents a real-time full-programmable fuzzy compiler based on piecewise linear interpolation techniques designed to be executed in SIMD (Single Instruction Mu...
Enrique Frías-Martínez, Julio Guti&e...