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ARC
2008
Springer
128views Hardware» more  ARC 2008»
13 years 9 months ago
A Framework for the Automatic Generation of Instruction-Set Extensions for Reconfigurable Architectures
Abstract. In this paper we present a framework for the automatic identification and selection of convex MIMO instruction-set extensions for reconfigurable architecture. The framewo...
Carlo Galuzzi, Koen Bertels
HIPEAC
2010
Springer
13 years 9 months ago
Virtual Ways: Efficient Coherence for Architecturally Visible Storage in Automatic Instruction Set Extensions
Abstract. Customizable processors augmented with application-specific Instruction Set Extensions (ISEs) have begun to gain traction in recent years. The most effective ISEs include...
Theo Kluter, Samuel Burri, Philip Brisk, Edoardo C...
DAC
2004
ACM
14 years 8 months ago
Introduction of local memory elements in instruction set extensions
Partha Biswas, Vinay Choudhary, Kubilay Atasu, Lau...
DAC
1996
ACM
13 years 11 months ago
Address Calculation for Retargetable Compilation and Exploration of Instruction-Set Architectures
The advent of parallel executing Address Calculation Units (ACUs) in Digital Signal Processor (DSP) and Application Specific InstructionSet Processor (ASIP) architectures has made...
Clifford Liem, Pierre G. Paulin, Ahmed Amine Jerra...
DAC
2009
ACM
13 years 8 months ago
Way Stealing: cache-assisted automatic instruction set extensions
This paper introduces Way Stealing, a simple architectural modification to a cache-based processor to increase data bandwidth to and from application-specific Instruction Set Exte...
Theo Kluter, Philip Brisk, Paolo Ienne, Edoardo Ch...