330 search results - page 14 / 66 » Instruction Set Limitation in Support of Software Diversity |
BMCBI
2011
12 years 11 months ago
2011
Background: With next-generation sequencing technologies, experiments that were considered prohibitive only a few years ago are now possible. However, while these technologies hav...
ISCA
2008
IEEE
14 years 2 months ago
2008
IEEE
The current trend is for processors to deliver dramatic improvements in parallel performance while only modestly improving serial performance. Parallel performance is harvested th...
CASES
2010
ACM
13 years 5 months ago
2010
ACM
The performance of most embedded systems is critically dependent on the memory hierarchy performance. In particular, higher cache hit rate can provide significant performance boos...
ICCD
2002
IEEE
14 years 4 months ago
2002
IEEE
Dynamically-loaded tagless loop caching reduces instruction fetch power for embedded software with small loops, but only supports simple loops without taken branches. Preloaded ta...
CASES
2005
ACM
13 years 9 months ago
2005
ACM
Computer security becomes increasingly important with continual growth of the number of interconnected computing platforms. Moreover, as capabilities of embedded processors increa...