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VLSID
2002
IEEE
98views VLSI» more  VLSID 2002»
14 years 7 months ago
On Test Scheduling for Core-Based SOCs
We present a mathematical model for the problem of scheduling tests for core-based system-on-chip (SOC) VLSI designs. Given a set of tests for each core in the SOC and a set of te...
Sandeep Koranne
MSN
2007
Springer
125views Sensor Networks» more  MSN 2007»
14 years 1 months ago
Ensuring Area Coverage in Hybrid Wireless Sensor Networks
Success of Wireless Sensor Networks largely depends whether the deployed network can provide desired coverage with acceptable network lifetime. This paper proposes a distributed pr...
Nadeem Ahmed, Salil S. Kanhere, Sanjay Jha
CODES
2006
IEEE
14 years 1 months ago
Streamroller: : automatic synthesis of prescribed throughput accelerator pipelines
In this paper, we present a methodology for designing a pipeline of accelerators for an application. The application is modeled using sequential C language with simple stylization...
Manjunath Kudlur, Kevin Fan, Scott A. Mahlke
ISCAS
1999
IEEE
106views Hardware» more  ISCAS 1999»
13 years 11 months ago
Test pattern generation for width compression in BIST
The main objectives of Built-In Self Test (BIST) are the design of test pattern generator circuits which achieve the highest fault coverage, require the shortest sequence of test ...
Paulo F. Flores, Horácio C. Neto, K. Chakra...
ISAAC
1992
Springer
132views Algorithms» more  ISAAC 1992»
13 years 11 months ago
Generalized Assignment Problems
In the multilevel generalized assignment problem (MGAP) agents can perform tasks at more than one efficiency level. Important manufacturing problems, such as lot sizing, can be ea...
Silvano Martello, Paolo Toth