System and processor architectures depend on changes in technology. Looking ahead as die density and speed increase, power consumption and on chip interconnection delay become incr...
We present the architecture and practical VLSI implementation of a 4-Tb/s single-stage switch. It is based on a combined input- and crosspoint-queued structure with virtual output...
Regarding nite state machines as Markov chains facilitates the application of probabilistic methods to very large logic synthesis and formal verication problems. Recently, we ha...
Gary D. Hachtel, Enrico Macii, Abelardo Pardo, Fab...
A large and increasing gap exists between processor and memory speeds in scalable cache-coherent multiprocessors. To cope with this situation, programmers and compiler writers mus...
Along with recent advances in mobile networking and portable computing technologies, there is a trend in the telecommunications industry toward the development of efficient ubiqui...