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DATE
2009
IEEE
113views Hardware» more  DATE 2009»
15 years 11 months ago
System-level process variability analysis and mitigation for 3D MPSoCs
Abstract—While prior research has extensively evaluated the performance advantage of moving from a 2D to a 3D design style, the impact of process parameter variations on 3D desig...
Siddharth Garg, Diana Marculescu
SACMAT
2009
ACM
15 years 11 months ago
xDomain: cross-border proofs of access
A number of research systems have demonstrated the benefits of accompanying each request with a machine-checkable proof that the request complies with access-control policy — a...
Lujo Bauer, Limin Jia, Michael K. Reiter, David Sw...
HOTI
2008
IEEE
15 years 10 months ago
A High-Speed Optical Multi-Drop Bus for Computer Interconnections
Buses have historically provided a flexible communications structure in computer systems. However, signal integrity constraints of high-speed electronics have made multi-drop elec...
Michael R. T. Tan, Paul Rosenberg, Jong Souk Yeo, ...
MICRO
2006
IEEE
144views Hardware» more  MICRO 2006»
15 years 10 months ago
Die Stacking (3D) Microarchitecture
3D die stacking is an exciting new technology that increases transistor density by vertically integrating two or more die with a dense, high-speed interface. The result of 3D die ...
Bryan Black, Murali Annavaram, Ned Brekelbaum, Joh...
SBCCI
2005
ACM
114views VLSI» more  SBCCI 2005»
15 years 10 months ago
Traffic generation and performance evaluation for mesh-based NoCs
The designer of a system on a chip (SoC) that connects IP cores through a network on chip (NoC) needs methods to support application performance evaluation. Two key aspects these ...
Leonel Tedesco, Aline Mello, Diego Garibotti, Ney ...