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TC
1998
13 years 6 months ago
Methodologies for Tolerating Cell and Interconnect Faults in FPGAs
—The very high levels of integration and submicron device sizes used in current and emerging VLSI technologies for FPGAs lead to higher occurrences of defects and operational fau...
Fran Hanchek, Shantanu Dutt
COMPSAC
2004
IEEE
13 years 10 months ago
Component Failure Mitigation According to Failure Type
Off-The-Shelf (OTS) software components are being used within complex safety-critical applications. However, to use these untrustworthy components with confidence, it is necessary...
Fan Ye, Tim Kelly
RTCSA
1999
IEEE
13 years 11 months ago
Scheduling Fault-Tolerant Distributed Hard Real-Time Tasks Independently of the Replication Strategies
Replication is a well-know fault-tolerance technique, and several replication strategies exist (e.g. active, passive, and semi-active replication). To be used in hard real-time sy...
Pascal Chevochot, Isabelle Puaut
ISCAPDCS
2004
13 years 8 months ago
Adaptive-Subcube Fault Tolerant Routing in Dual-Cube with Very Large Number of Faulty Nodes
The dual-cube is a newly proposed interconnection network for linking a large amount of nodes with low node degree. It uses low-dimensional hypercubes as building blocks and keeps...
Yamin Li, Shietung Peng, Wanming Chu
DAC
2012
ACM
11 years 9 months ago
Towards fault-tolerant embedded systems with imperfect fault detection
Many state-of-the-art approaches on fault-tolerant system design make the simplifying assumption that all faults are detected within a certain time interval. However, based on a d...
Jia Huang, Kai Huang, Andreas Raabe, Christian Buc...