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ICCAD
1993
IEEE
104views Hardware» more  ICCAD 1993»
14 years 6 days ago
Parallel timing simulation on a distributed memory multiprocessor
Circuit simulation is one of the most computationally expensive tasks in circuit design and optimization. Detailed simulation at the level of precision of SPICE is usually perform...
Chih-Po Wen, Katherine A. Yelick
DATE
2003
IEEE
112views Hardware» more  DATE 2003»
14 years 1 months ago
Automatic Generation of Simulation Monitors from Quantitative Constraint Formula
System design methodology is poised to become the next big enabler for highly sophisticated electronic products. Design verification continues to be a major challenge and simulat...
Xi Chen, Harry Hsieh, Felice Balarin, Yosinori Wat...
IPPS
2002
IEEE
14 years 1 months ago
Implementing the NAS Benchmark MG in SAC
SAC is a purely functional array processing language designed with numerical applications in mind. It supports generic, high-level program specifications in the style of APL. How...
Clemens Grelck
ICRA
2003
IEEE
94views Robotics» more  ICRA 2003»
14 years 1 months ago
A scalable approach to human-robot interaction
Much of the current research in human-robot interaction is concerned with single systems and single or few users. These systems and their interfaces are generally tightly-coupled ...
Ashley Tews, Maja J. Mataric, Gaurav S. Sukhatme
CHES
2007
Springer
136views Cryptology» more  CHES 2007»
14 years 2 months ago
CAIRN 2: An FPGA Implementation of the Sieving Step in the Number Field Sieve Method
The hardness of the integer factorization problem assures the security of some public-key cryptosystems including RSA, and the number field sieve method (NFS), the most efficient ...
Tetsuya Izu, Jun Kogure, Takeshi Shimoyama