Sciweavers

154 search results - page 5 / 31
» Interconnect Optimization Strategies for High-Performance VL...
Sort
View
ICCAD
2010
IEEE
158views Hardware» more  ICCAD 2010»
13 years 8 months ago
Novel binary linear programming for high performance clock mesh synthesis
Clock mesh is popular in high performance VLSI design because it is more robust against variations than clock tree at a cost of higher power consumption. In this paper, we propose ...
Minsik Cho, David Z. Pan, Ruchir Puri
PDP
2009
IEEE
14 years 5 months ago
Phoenix: A Runtime Environment for High Performance Computing on Chip Multiprocessors
Abstract—Execution of applications on upcoming highperformance computing (HPC) systems introduces a variety of new challenges and amplifies many existing ones. These systems will...
Avneesh Pant, Hassan Jafri, Volodymyr V. Kindraten...
FITRAMEN
2008
13 years 12 months ago
High-Performance H.264/SVC Video Communications in 802.11e Ad Hoc Networks
This work focuses on improving the performance of video communications based on the recently developed H.264 Scalable Video Coding (SVC) standard over 802.11e wireless networks. Th...
Attilio Fiandrotti, Dario Gallucci, Enrico Masala,...
ISVLSI
2005
IEEE
80views VLSI» more  ISVLSI 2005»
14 years 4 months ago
Sensitivity Analysis of a Cluster-Based Interconnect Model for FPGAs
Mesh interconnect can be efficiently utilized while tree networks encourage the short routing distances. In this paper, we present the property analysis of a cluster-based interc...
Renqiu Huang, Ranga Vemuri
ICS
2005
Tsinghua U.
14 years 3 months ago
High performance support of parallel virtual file system (PVFS2) over Quadrics
Parallel I/O needs to keep pace with the demand of high performance computing applications on systems with ever-increasing speed. Exploiting high-end interconnect technologies to ...
Weikuan Yu, Shuang Liang, Dhabaleswar K. Panda