154 search results - page 9 / 31 » Interconnect Optimization Strategies for High-Performance VL... |
GLVLSI
2005
IEEE
14 years 4 months ago
2005
IEEE
The dependence of the propagation delay of the interlayer 3-D interconnects on the vertical through via location and length is investigated. For a variable vertical through via lo...
ISVLSI
2006
IEEE
14 years 4 months ago
2006
IEEE
One major issue in designing image processors is to design a memory system that supports parallel access with a simple interconnection network. This paper presents a design method...
ISCAS
2005
IEEE
14 years 4 months ago
2005
IEEE
— As across-chip wire delays exceed a clock cycle, interconnect pipelining becomes essential. However, the arbitrary insertion of flip-flops can change the differentials of lat...
FCCM
2004
IEEE
14 years 2 months ago
2004
IEEE
Intrusion detection for network security is a computation intensive application demanding high system performance. System level design, a relatively unexplored field in this area,...
GLVLSI
2003
IEEE
14 years 3 months ago
2003
IEEE
The current trends in high performance integrated circuits are towards faster and more powerful circuits in the giga-hertz range and even further. As the more complex Integrated C...