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» Interconnect design methods for memory design
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AE
2003
Springer
13 years 11 months ago
ParaDisEO-Based Design of Parallel and Distributed Evolutionary Algorithms
ParaDisEO is a framework dedicated to the design of parallel and distributed metaheuristics including local search methods and evolutionary algorithms. This paper focuses on the la...
Sébastien Cahon, Nordine Melab, El-Ghazali ...
GECCO
2007
Springer
188views Optimization» more  GECCO 2007»
14 years 1 months ago
Using genetic algorithms for naval subsystem damage assessment and design improvements
Some auxiliary systems of next generation naval ships will utilize distributed automatic control. Such distributed control systems will use interconnected sensors, actuators, cont...
Christopher McCubbin, David Scheidt, Oliver Bandte...
ICES
2000
Springer
91views Hardware» more  ICES 2000»
13 years 11 months ago
Dynamic Optimisation of Non-linear Feed Forward Circuits
Abstract. An evolutionary algorithm is used to evolve a digital circuit which computes a simple hash function mapping a 16-bit address space into an 8-bit one. The target technolog...
Ernesto Damiani, Valentino Liberali, Andrea Tettam...
HPCA
2003
IEEE
14 years 8 months ago
Dynamic Voltage Scaling with Links for Power Optimization of Interconnection Networks
Originally developed to connect processors and memories in multicomputers, prior research and design of interconnection networks have focused largely on performance. As these netw...
Li Shang, Li-Shiuan Peh, Niraj K. Jha
PATMOS
2005
Springer
14 years 1 months ago
Closed-Form Bounds for Interconnect-Aware Minimum-Delay Gate Sizing
Early circuit performance estimation and easy-to-apply methods for minimum-delay gate sizing are needed, in order to enhance circuit’s performance and to increase designers’ pr...
Giorgos Dimitrakopoulos, Dimitris Nikolos