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» Interconnect design methods for memory design
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ISMVL
2009
IEEE
124views Hardware» more  ISMVL 2009»
14 years 2 months ago
Equivalence Checking of Reversible Circuits
Determining the equivalence of reversible circuits designed to meet a common specification is considered. The circuits’ primary inputs and outputs must be in pure logic states ...
Robert Wille, Daniel Große, D. Michael Mille...
SOUPS
2009
ACM
14 years 2 months ago
Graphical passwords as browser extension: implementation and usability study
Abstract: Today, most Internet applications still establish user authentication with traditional text based passwords. Designing a secure as well as a user-friendly password-based ...
Kemal Bicakci, Mustafa Yuceel, Burak Erdeniz, Haka...
ICPP
2008
IEEE
14 years 2 months ago
Scioto: A Framework for Global-View Task Parallelism
We introduce Scioto, Shared Collections of Task Objects, a lightweight framework for providing task management on distributed memory machines under one-sided and globalview parall...
James Dinan, Sriram Krishnamoorthy, D. Brian Larki...
ASAP
2007
IEEE
219views Hardware» more  ASAP 2007»
14 years 1 months ago
SIMD Vectorization of Histogram Functions
Existing SIMD extensions cannot efficiently vectorize the histogram function due to memory collisions. We propose two techniques to avoid this problem. In the first, a hierarchi...
Asadollah Shahbahrami, Ben H. H. Juurlink, Stamati...
DATE
2007
IEEE
92views Hardware» more  DATE 2007»
14 years 1 months ago
Test quality analysis and improvement for an embedded asynchronous FIFO
Embedded First-In First-Out (FIFO) memories are increasingly used in many IC designs. We have created a new full-custom embedded FIFO module with asynchronous read and write clock...
Tobias Dubois, Erik Jan Marinissen, Mohamed Aziman...